Confirmit now employs over 400 people and has offices in Oslo (headquarters) and Grimstad, Norway; London, UK; New York and San Francisco in the US; Vancouver in Canada; Chengdu in China; and Moscow and Yaroslavl in Russia. Our client list includes globally recognised brands such as Best Buy, British Airways, Disney, Google, Halifax Bank of Scotland, HSBC, JP Morgan Chase, Microsoft, Nielsen, Safeco Insurance, Statoil, Symantec, Toyota, Virgin Media, Yahoo, Zynga, etc.

The Global Solutions Team is a customer-facing development team that works closely with Confirmit’s Sales and R&D teams to create solutions around and outside the core Confirmit product in order to win sales.

We’re looking for an experienced software developer to join the Global Solutions Team and deliver custom solutions for our most important clients.
Description of Responsibilities: Consulting with clients and internal team members on solutions, understanding business requirements and creating the required technical specification definition (SOW) Building creative custom solutions built on top/on the side of our core Confirmit platform through: Confirmit’s and externals APIs and web services Confirmit Flex Extension Framework Creating sophisticated reporting capabilities through scripting. Integration with client’s IT systems (SSO) Qualifications or Skills required: Design and develop code and tests for high-performance web systems Microsoft .NET framework, C#, ASP.NET Good working knowledge in client-side scripting (JavaScript) combined with HTML5, CSS3 background Algorithms and analytics Good written and verbal communication skills in order to communicate Confirmit solutions to a wide range of audiences including existing customers, prospects, partners, sales team members, industry analysts and media. Ability to understand business requirements and translate these into technical solutions BS or MS in Computer Science or equivalent 3 -5 years of professional experience Ability to work as part of a team as well as on your own
Confirmit - 18 hours ago - save job - copy to clipboard Confirmit is the world's leading SaaS vendor for multichannel Voice of the Customer, Employee Feedback, and Market Research applications....

View the Job here

Corporate headquarters are in Santa Clara, California, USA, with international operations in India and Russia.

The company has grown to a 250-person semiconductor startup with operations in the U.S., India and Russia.

Soft Machines investors include Samsung Ventures, AMD, Mubadala, RVC, KACST, RUSNANO, TAQNIA and other strategic investors.

This is a key role optimizing JIT and Binary translator.

Your success will be measured by taking ownership of the project and see it through from prototyping to productization of an O3 level JIT to achieve 20% + geometric mean performance gain.

The formidable task in front of you is to complete within the 1 st year the integration of LLVM into JIT infrastructure, achieve 100% pass rate on benchmarks, and achieve 90% of prototype performance levels. This will require you to achieve two challenging milestones;

(1) Integrate internal memory manager into LLVM at the IR level,

(2) Drive porting/tuning optimization into LLVM infrastructure. Along the way you will also apply your skills and experience to improve overall overhead reduction in LLVM infrastructure.

This role is available because the current team we have is already focused on overall performance with proprietary low latency JIT’s, customization of browser based JIT’s, and related runtimes. The bandwidth, to do this project does not exist without dropping other equally important projects. This is mission critical and you performance will has a huge impact to the project and you must drive the implementation and be the point person on all technical aspects.

You will impact the company by elevating performance gains made through software to help drive the company’s competitive benefits higher than just hardware alone.

This role will test you. You will be interacting heavily with hardware design groups on unreleased hardware and this creates limitations that normally a software engineer working on commodity hardware will not confront. Additionally, your flexibility and prescient awareness of what needs to be done next will get fully exercised to help bring the hardware design to fruition.

The very best in this role will know how to get things done quickly and correctly but in a maintainable fashion so that others can help/take over when needed. Taking the complex and making it simple is not an easy task but it is a brilliant outcome.

What is in it for you?

The opportunity to work on a project that has a high chance to revolutionize CPU designs.

This role has high visibility within the company, and the achievement of attaining the performance objects in the role will define a career.

Working on our unique architecture and pushing compiler technology ahead of other hardware companies will be the hallmark of your abilities.

The baseline skills you need in this role are:
LLVM, Binary Translator/JIT experience.

Experience doing hardware performance analysis and target specific optimizations in the compiler.

Knowledge of auto-vectorization of binaries.

View the Job here

The environment
Will work with the Microprocessor Verification (DV) team. Responsible for pre-silicon RTL verification of a complex low power, high performance design that includes digital and analog cores. This team deos testbench/testplans development, block level verification, full-chip verification, coverage driven verification, system & architectural compatibility verification and assertions driven verification. You will be mentored and trained by Senior Staff.

qualifying experience

* Internship or core curriculum experience in pre-silicon verification
* Hands on experience with System Verilog, NTB/VERA, SPECMAN, C/C++, Perl and Ruby
* Must be familiar with one or more of, SPARC, X86, MIPS, ARM and PowerPC
* Processor verification knowledge is desired
* Assembly language test writing/debug is a plus, as is familiarity with UVM/OVM

This is a temp-to-hire role. We have hired numerous interns into Full-Time-Regular employment either directly or following graduation.

NCGs may apply, please understand this is a temp-to-full-time regular hire.
Quantum Solution - 3 days ago - save job - copy to clipboard

View the Job here

Corporate headquarters are in Santa Clara, California, USA, with international operations in India and Russia.

The company has grown to a 250-person semiconductor startup with operations in the U.S., India and Russia.

Soft Machines investors include Samsung Ventures, AMD, Mubadala, RVC, KACST, RUSNANO, TAQNIA and other strategic investors.

.

Job Description

Looking for intern to work with experienced memory array circuit design engineers who lead back-end effort on complex high performance/low powerCPU core design

Classes or internships in the following areas

View the Job here

Responsibilities:

Requirements:

We offer:

View the original article here

Corporate headquarters are in Santa Clara, California, USA, with international operations in India and Russia.

The company has grown to a 250-person semiconductor startup with operations in the U.S., India and Russia.

Soft Machines investors include Samsung Ventures, AMD, Mubadala, RVC, KACST, RUSNANO, TAQNIA and other strategic investors.

Good understanding of overall RTL-to-GDS flow , circuit analysis , STA timing concepts is required. Good scripting skills in Perl and Tcl will also be required

Skills:
1. TCL ( required)

2. Flow : ( RTL-to-GDS flow | P&R flows design flow | synthesis flows | development flows | IP integration flows)

3. Timing: Static Timing Analysis tools (e.g., Synopsys PrimeTime, Cadence Encounter)

4. Synthesis: Synthesis tools (e.g. Synopsys Design Compiler, Cadence RTL compiler, etc.).

Nani 9/2 ---------------

Transistor level/Custom block timing (Nanotime or Liberate or Silicon Smart etc)

Circuit ERC (Perc, InsightEDA, YXtech)

Virtuoso expertise (SKILL language etc)

Data management expertise (Cliosoft SOS or ICmanage or VersIC)

Tapeout or IP QA checker

Perl, TCL, Flow dev, Scripting

View the Job here

The company has grown to a 250-person semiconductor startup with operations in the U.S., India and Russia.

Soft Machines is in the business of licensing and co-developing Soft Machines VISC™ architecture-based microprocessor and SoC products for IoT, mobile and cloud markets.

Corporate headquarters are in Santa Clara, California, USA, with international operations in India and Russia.

Soft Machines investors include Samsung Ventures, AMD, Mubadala, RVC, KACST, RUSNANO, TAQNIA and other strategic investors.

As the CPU Micro Architect you will own: Microarchitecture definition, development and specification.

Starting with NEW high-level architectural model, through micro-architectural research and arriving at a detailed specification.
As RTL Engineer you will own development, assessment and refinement of RTL design to target power, performance, area and timing goals.
Validation - Support testbench development and simulation for functional and performance verification. Performance exploration and correlation
Explore high performance strategies and validate that the RTL design meets targeted performance.
Work with design team members across disciplines (Logic, Circuits, PD, DFT) to implement and validate physical design on the aspects of timing, area, reliability, testability and power.

This role calls for 10+ years of CPU Microarchitecture and RTL design experience.

Thorough knowledge of microprocessor architecture (ARM|x86|SPARC|MIPS) including expertise in one (1) or more of the following areas:

SOC/GPU/CPU/NPU: Coherency, Cache (Data, Instruction Cache, L2, L3)

CPU: Out-of-order processor design (Scheduler, Load Store Unit/Load Store Queue, Instruction fetch, Branch predictor)

Execution Unit Design : Floating Point Unit (FPU) or Integer arithmetic (ALU)

Memory Management Unit (MMU)) & Memory subsystems

Knowledge of logic design principles along with timing and power implications.

Expert in low power microarchitecture techniques.

Expert in high performance techniques and trade-offs in a CPU microarchitecture.

View the Job here

Corporate headquarters are in Santa Clara, California, USA, with international operations in India and Russia.

The company has grown to a 250-person semiconductor startup with operations in the U.S., India and Russia.

Soft Machines investors include Samsung Ventures, AMD, Mubadala, RVC, KACST, RUSNANO, TAQNIA and other strategic investors.
.

In your new role you will be:
Developing a next-generation, processor-like core.

Duties include micro-architecture specification and logic design for a high-performance, low-power CPU core.

The successful candidate will:
Participate in hardware feasibility analysis and micro-architecture specificationImplement logic in Verilog RTL based on architecture specifications and team meetingsProvide verification cases to ensure coverage goals are met by DV teamDebug and fix issues found in design verificationParticipate in timing closureWork with design team members across disciplines (Logic, Circuits, PD, DFT)Meet all functional, area, power, and performance requirementsBackground Requirements Strong computer/processor architecture, modern high performance micro-architecture, and RTL coding.Understanding of memory array structures at a functional and circuit level is a plus.Understanding of physical design issues and timing impact in micro architecture and RTL development is required.Good verification backgroundPHD combined with advanced research in CPU performance modeling, cache and memory systems
Quantum Solution - 1 day ago - save job - copy to clipboard Quantum Software Solutions provide end-to-end custom development services, from identifying your needs and gathering requirements through to...

View the Job here